And now I wanna tell you about
Convergent Processor Concept
As software concept .NET technology is very similar to Java technology. .NET software is intended for “safe” execution model “once written – executing on any platform” for software transmission over the Internet and safe execution over different hardware platforms. .NET is implied for converging different computational devices — .NET resources must be accessible for mobile phones, PDAs, different handhelds, desktop computers. But, .NET platform software utilizes so many resources, that its port to mobile devices, which have less resources than typical modern PDA (400Mhz XScale with 32 MB RAM), should be ineffective. An important problem here is amount of consumed electrical energy – true mobile devices should work much longer than 5-6 hours (like PDAs). Therefore, the implementation of a CIL engine “in hardware” is a very attractive idea, it allows, for example, to implement whole digital home concept using .NET technology.
Like a Java machine, .NET engine is based on abstract stack machine implementation. The stack machine is a very good formal approach to a virtual machine implementation, but a .NET stack-based interpreter can not be mapped easily (without the help of Jist-in-Time Compiler – JIT) on RISC-processor – an interpreter will execute CIL code ten times slower than a JIT-compiler does the native code.
So, a straightforward attempt for the CIL processor implementation should be the implementation of a typed stack machine, as the stack engine is probably the simplest processor implementation [1]. As the stack machine does not use direct register addressing, instruction decoding is very simple, and instruction execution cycle is very short, and there are no additional multiplexer switches for read and write ports as in RISC register file. Though the stack processor has limited ability for parallel execution, it has low complexity and low power consumption, as there is no large multiplexer schematic for the stack engine registers.
Another opportunity is the hardware emulation of CIL engine. E.g., , there are different approaches to Java processor implementation for mobile devices: a Java-oriented coprosessor, such as [2] or a technology, such as Jazelle [3], where two additional pipeline stages are integrated into the ARM core. These extra pipeline stages decode Java instructions so that they can be executed directly as usual ARM RISC instruction. Thus, the hardware CIL processor also can be implemented in such a way — on the top of some processor core.
Sure, the CIL processor can not be a competitor for desktop and PDA market, but end-user specialized devices, like Web-terminals, interactive TV-sets, digital home systems and other devices are a good target. The processor must handle multimedia Internet content (tasks like MPEG1/2/3 playback, MPEG4 and DVD video playback, Flash playing), consuming low energy. Therefore, we decided to implement a dual-decoder scheme, where a processor core can execute two instruction sets (CIL and DSP) as the native code.
to be contnued...
p.s. be free for asking me question
all information pesented here was published in our article in IEEE, September, 2005